Research on phase-frequency detector algorithms for fast locking PLL frequency synthesizers

Circuits and Systems for Receiving, Transmitting and Signal Processing
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Abstract:

Methods of accelerating transient processes in frequency synthesizers based on a pulse phase-locked loop (PLL) using a coarse accelerating control before the PLL reaches small frequency errors with subsequent accurate phase control are briefly considered. To determine the need to turn on the coarse accelerating control, phase-frequency detectors (PFD) with saturation states are used. The article discusses four well-known algorithms of the PFD, which differ from each other in the conditions and direction of exit from the saturation states. It is shown that without changing the specifications of the elements of the PLL in saturation states, none of the algorithms of the PFD has any significant advantage. When changing the specifications of the elements of the PLL, the algorithm of the PFD, which, upon exiting the saturation states, goes into phase control of the opposite action, immediately after exiting the saturation states has more effective error elimination and, therefore, a more optimal resulting transient process.