Stabilized Current Source in 180 nm CMOS

Circuits and Systems for Receiving, Transmitting and Signal Processing
Authors:
Mironov K.A.Morozov D.V.Pilipko M.M.
Abstract:

This paper presents a comparative analysis of four CMOS stabilized current source architectures: the beta-multiplier, an op-amp-enhanced beta-multiplier, the Nagata current source, and a modified Nagata source with active feedback based on an op-amp. The study focuses on evaluating their performance in terms of thermal stability, dependence on supply voltage and the output noise current spectral density. Analytical considerations were validated through simulation using the Mikron JSC 180 nm 1.8 V CMOS process. The findings reveal the trade-offs between circuit complexity, supply voltage and temperature independence, as well as noise level. The op-amp-enhanced Nagata current source is the best of the considered circuits and has the following characteristics: nominal current 15.14 µA, supply voltage dependence of the reference current 0.1 µA/V, RMS output noise current 63.98 nA (within 0.1 Hz to 1 MHz band), current temperature coefficient 66.15 ppm/°C. This circuit has been chosen for the layout implementation. Layout sizes are 18×28 µm.

Funding:

The integrated circuit was manufactured using funds from the Ministry of Science and Higher Education of the Russian Federation within the framework of the federal project “Training of personnel and scientific foundation for the electronics industry” under the state assignment “Development of a prototyping methodology for electronic component base using domestic microelectronic manufacturing facilities based on MPW service” (FSMR-2023-0008).

Key words:
CMOSreference current sourceoutput noise currentPTAT currentCTAT current
  • References

    1. Park Y.-S., Kim H.-R., Oh J.-H., Choi Y.-K., Kong B.-S. Compact 0.7-V CMOS voltage/current reference with 54/29-ppm/°C temperature coefficient. 2009 International SoC Design Conference (ISOCC), 2009, Pp. 496–499. DOI: 10.1109/SOCDC.2009.5423852

    2. Chun H., Lehmann T. CMOS current reference generator using integrated resistors. 2010 International Conference on Electronics and Information Engineering, 2010, Pp. V1-290–V1-294. DOI: 10.1109/ICEIE.2010.5559872

    3. Baker R.J. CMOS: Circuit Design, Layout, and Simulation, 4th ed. Hoboken, NJ: John Wiley & Sons, Inc., 2019.

    4. Hirano M., Tsukiji N., Kobayashi H. Simple reference current source insensitive to power supply volta-ge variation – improved Minoru Nagata current source. 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), 2016, Pp. 87–89. DOI: 10.1109/ICSICT.2016.7998846

    5. Hosono T., Kamio T., Yamamoto S., Matsuda J., Hirai K., Katayama S. CMOS Nagata Current Sources with Self-Bias Configuration Insensitive to Supply Voltage and Temperature. 2021 International Conference on Electrical, Computer and Energy Technologies (ICECET), 2021, pp. 1–6. DOI: 10.1109/ICECET52533.2021.9698748

    6. Hosono T., Sha L., Yamamoto S., Hirano M., Ida T., Kuwana A. Improved Nagata Current Source Insensitive to Temperature and Power Supply Voltage. 2020 International SoC Design Conference (ISOCC), 2020, Pp. 151–152. DOI: 10.1109/ISOCC50952.2020.9333005

    7. Hirano M., Kushita N., Moroshima Y., Harakawa H., Oikawa T., Tsukiji N. Silicon Verification of Improved Nagata Current Mirrors. 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), 2018, Pp. 1–3. DOI: 10.1109/ICSICT.2018.8565733

    8. Wenger Y., Meinerzhagen B. A stable CMOS current reference based on the ZTC operating point. 2017 13th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), 2017, Pp. 273–276. DOI: 10.1109/PRIME.2017.7974160

    9. Kleczek R., Grybos P. Low voltage area efficient current-mode CMOS bandgap reference in deep submicron technology. 2014 Proceedings of the 21st International Conference Mixed Design of Integrated Circu-its and Systems (MIXDES), 2014, Pp. 247–251. DOI: 10.1109/MIXDES.2014.6872194

    10. Gray P.R., Hurst P.J., Lewis S.H., Meyer R.G. Analysis and Design of Analog Integrated Circuits, 5th ed. NY: Wiley, 2009.

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