A spiking neural network in 180 nm CMOS

Circuits and Systems for Receiving, Transmitting and Signal Processing
Authors:
Pilipko M.M.Morozov D.V.
Abstract:

A hardware implementation of a spiking neural network for classifying font images of letters and numbers has been developed in the 180 nm CMOS technology of Mikron JSC. The layout dimensions are 500×550 µm. The supply voltage is 1.0 V. The average power consumption is approximately 0.06 mW. The clock frequency is up to 10 MHz. The neural network contains four layers of 15, 8, 8, and 10 nodes, respectively. The input data and synapse weights have a bit width of 3 bits. A comparison with the results from other studies is performed.

Funding:

The integrated circuit was manufactured using funds from the Ministry of Science and Higher Education of the Russian Federation within the framework of the federal project “Training of personnel and scientific foundation for the electronics industry” under the state assignment “Development of a prototyping methodology for electronic component base using domestic microelectronic manufacturing facilities based on MPW service”.

Key words:
CMOSanalog neural networkleaky integrating neuron
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