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<article article-type="research-article" dtd-version="1.3" xml:lang="en">
  <front xmlns:xlink="http://www.w3.org/1999/xlink">
    <journal-meta>
      <journal-title-group>
        <journal-title>Computing, Telecommunication and Control</journal-title>
        <trans-title-group xml:lang="ru">
          <trans-title>Информатика, телекоммуникации и управление</trans-title>
        </trans-title-group>
      </journal-title-group>
      <issn pub-type="epub">2687-0517</issn>
    </journal-meta>
    <article-meta xmlns:xlink="http://www.w3.org/1999/xlink">
      <article-id pub-id-type="publisher-id">2</article-id>
      <article-id pub-id-type="doi">10.18721/JCSTCS.15202</article-id>
      <title-group>
        <article-title>Modern approaches to design of multi-channel delta-sigma ADCs</article-title>
        <trans-title-group xml:lang="ru">
          <trans-title>Современные подходы к проектированию многоканальных дельта-сигма АЦП</trans-title>
        </trans-title-group>
      </title-group>
      <contrib-group>
        <contrib contrib-type="author">
          <name>
            <surname>Satyshev</surname>
            <given-names>Vladislav</given-names>
          </name>
          <xref ref-type="aff" rid="aff1"/>
          <email>sateshev5@yandex.ru</email>
        </contrib>
      </contrib-group>
      <aff id="aff1">Peter the Great St. Petersburg Polytechnic University</aff>
      <pub-date publication-format="electronic" date-type="pub" iso-8601-date="2022-06-30">
        <day>30</day>
        <month>06</month>
        <year>2022</year>
      </pub-date>
      <volume>15</volume>
      <issue>2</issue>
      <fpage>25</fpage>
      <lpage>31</lpage>
      <self-uri xmlns:xlink="http://www.w3.org/1999/xlink" content-type="pdf" xlink:href="https://infocom.spbstu.ru/userfiles/files/articles/2022/2/25-31.pdf"/>
      <abstract xml:lang="en">
        <p>Incremental delta-sigma ADC (IADC) and memoryless delta-sigma ADC are described. These two approaches allow to utilize a delta-sigma ADC, known for its increased resolution, in multi-channel systems due to the inter-sample interference suppression that two mentioned structures provide. In this paper, MATLAB/Simulink models of the mentioned structures are presented. In particular, limiting blocks are added to take into account nonlinearities due to finite power supply of integrators; coefficients of delta-sigma modulators were selected so as to maximize their signal-to-noise ratio; parameters of the raised cosine filter were selected to minimize crosstalk between channels. Results of simulations, namely power spectral density of the output signals and signal-to-noise ratio of the output signals, confirm operability of the described structures.</p>
      </abstract>
      <kwd-group xml:lang="en">
        <kwd>analog-to-digital converter</kwd>
        <kwd>delta-sigma modulation</kwd>
        <kwd>inter-sample interference</kwd>
        <kwd>incremental delta-sigma ADC</kwd>
        <kwd>memoryless delta-sigma ADC</kwd>
      </kwd-group>
    </article-meta>
  </front>
</article>
