Computing, Telecommunication and Control Информатика, телекоммуникации и управление 2687-0517 1 10.18721/JCSTCS.19201 Spiking neural network analog two-variable neuron implementation Реализация аналогового двоичного нейрона для импульсной нейронной сети Skrebenkov Danil skrebenkov_di@spbstu.ru Budanov Dmitriy dmitriy.budanov@gmail.com 30 06 2026 19 2 7 15

Currently, the problem of using neural networks in embedded systems, which have constraints on power consumption and area occupied, is relevant. At the same time, there is growing interest in spiking neural networks – more biologically realistic neural networks with potentially higher energy efficiency. This paper presents a review of existing hardware implementations of spiking neural networks, implemented both in the digital and analog domains. A hardware implementation of analog spiking neuron and synapse fabricated in Mikron JSC 180 nm CMOS technology with a reduced supply voltage of 0.6 V is presented. According to the simulation results, the energy consumption of a single neuron was 1.46 pJ/spike. The paper also provides a formula for comparing energy consumption between neurons fabricated in different technologies and with different supply voltages. According to this formula, the energy consumption of the implemented neuron is comparable to that of the referenced sources.

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