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<!DOCTYPE article PUBLIC "-//NLM//DTD JATS (Z39.96) Journal Publishing DTD v1.3 20210610//EN" "https://jats.nlm.nih.gov/publishing/1.3/JATS-journalpublishing1-3.dtd">
<article article-type="research-article" dtd-version="1.3" xml:lang="ru">
  <front>
    <journal-meta>
      <journal-title-group>
        <journal-title>Computing, Telecommunication and Control</journal-title>
        <trans-title-group xml:lang="ru">
          <trans-title>Информатика, телекоммуникации и управление</trans-title>
        </trans-title-group>
      </journal-title-group>
      <issn pub-type="epub">2687-0517</issn>
    </journal-meta>
    <article-meta>
      <article-id pub-id-type="publisher-id">1</article-id>
      <article-id pub-id-type="doi">10.18721/JCSTCS.14401</article-id>
      <title-group>
        <article-title>ASIC implementation of high-speed vector magnitude &amp; arctangent approximator</article-title>
        <trans-title-group xml:lang="ru">
          <trans-title>Реализация интегральной схемы специального назначения высокоскоростного аппроксиматора для величины и арктангенса векторов</trans-title>
        </trans-title-group>
      </title-group>
      <contrib-group>
        <contrib contrib-type="author">
          <name>
            <surname>Assim</surname>
            <given-names>Ara Abdulsatar</given-names>
          </name>
          <xref ref-type="aff" rid="aff1"/>
          <email>araabdulsattar@gmail.com</email>
        </contrib>
      </contrib-group>
      <aff id="aff1">Salahaddin University</aff>
      <pub-date publication-format="electronic" date-type="pub" iso-8601-date="2021-12-31">
        <day>31</day>
        <month>12</month>
        <year>2021</year>
      </pub-date>
      <volume>14</volume>
      <issue>4</issue>
      <fpage>7</fpage>
      <lpage>14</lpage>
      <abstract xml:lang="en">
        <p>The quadrature processing techniques used in spectral analysis, computer graphics, and digital communications constantly demand high-speed calculation of the magnitude of a complex number (vector V) given its real and imaginary parts. The aim of this work is designing a digital signal processor (DSP processor) for approximating magnitude and arctangent (phase) of vectors (and/or complex numbers). This work can be divided into three main stages. Firstly, a mathematical model is designed in Simulink, then using that model. Secondly, Verilog description code is generated. The code is used to perform logic synthesis (converting the description code into logic gates) using XT018 technology (180 nm BCD-on-SOI) from X-FAB. Lastly, an ASIC (Application Specific Integrated Circuit) is created from the logic gates. The inputs and outputs of the device are fixed-point numbers, their length is equal to 16 bits and the fraction length is 8 bits. The proposed system can calculate magnitude and phase with an error of less than 1 and 0.35 % respectively.</p>
      </abstract>
      <kwd-group xml:lang="en">
        <kwd>alpha max plus beta min algorithm</kwd>
        <kwd>arctangent approximation</kwd>
        <kwd>fast magnitude approximation</kwd>
        <kwd>digital signal processing</kwd>
        <kwd>DSP processor</kwd>
      </kwd-group>
    </article-meta>
  </front>
</article>
