<?xml version="1.0" encoding="utf-8"?>
<!DOCTYPE article PUBLIC "-//NLM//DTD JATS (Z39.96) Journal Publishing DTD v1.3 20210610//EN" "https://jats.nlm.nih.gov/publishing/1.3/JATS-journalpublishing1-3.dtd">
<article article-type="research-article" dtd-version="1.3" xml:lang="ru">
  <front>
    <journal-meta>
      <journal-title-group>
        <journal-title>Computing, Telecommunication and Control</journal-title>
        <trans-title-group xml:lang="ru">
          <trans-title>Информатика, телекоммуникации и управление</trans-title>
        </trans-title-group>
      </journal-title-group>
      <issn pub-type="epub">2687-0517</issn>
    </journal-meta>
    <article-meta>
      <article-id pub-id-type="publisher-id">19</article-id>
      <title-group>
        <article-title>Application of a method of balancing of magnitude response at synthesis of not recursive digital filters</article-title>
        <trans-title-group xml:lang="ru">
          <trans-title>Применение метода симметрирования АЧХ при синтезе нерекурсивных цифровых фильтров</trans-title>
        </trans-title-group>
      </title-group>
      <contrib-group>
        <contrib contrib-type="author">
          <name>
            <surname>Kaplun</surname>
            <given-names>Dmitriy</given-names>
          </name>
          <email>Mitya_kapl@front.ru</email>
        </contrib>
        <contrib contrib-type="author">
          <name>
            <surname>Merkucheva</surname>
            <given-names>Tatyana</given-names>
          </name>
        </contrib>
      </contrib-group>
      <pub-date publication-format="electronic" date-type="pub" iso-8601-date="2009-04-10">
        <day>10</day>
        <month>04</month>
        <year>2009</year>
      </pub-date>
      <issue>2</issue>
      <issue-id pub-id-type="publisher-id">76</issue-id>
      <fpage>104</fpage>
      <lpage>110</lpage>
      <abstract xml:lang="en">
        <p>Effective hardware realisation of digital filters means minimisation of computing expenses. To reduce computing expenses at realisation of digital filters it is possible for the account of reduction quantity of multiplicationes. For this purpose it is offered in article to use balancing of magnitude responses and a balancing special case - double symmetry.</p>
      </abstract>
      <kwd-group xml:lang="en">
        <kwd>digital filters</kwd>
        <kwd>FPGA</kwd>
        <kwd>DSP</kwd>
        <kwd>balancing</kwd>
        <kwd>double symmetry</kwd>
        <kwd>magnitude response</kwd>
        <kwd>multipliers</kwd>
        <kwd>cycles on sample</kwd>
      </kwd-group>
    </article-meta>
  </front>
</article>
